IEC 61943 : 1.0

Table of Contents

FOREWORD <br>1 General <br>&nbsp;&nbsp;&nbsp;&nbsp;1.1 Scope and object<br>&nbsp;&nbsp;&nbsp;&nbsp;1.2 Normative reference <br>2 Definitions <br>3 Principles for qualified manufacturer list <br>&nbsp;&nbsp;&nbsp;&nbsp;(QML) approval<br>&nbsp;&nbsp;&nbsp;&nbsp;3.1 Identification and definition of tasks<br>&nbsp;&nbsp;&nbsp;&nbsp;3.2 Product specifications <br>4 Process design (task 1)<br>&nbsp;&nbsp;&nbsp;&nbsp;4.1 Field of application<br>&nbsp;&nbsp;&nbsp;&nbsp;4.2 Description of activities <br>&nbsp;&nbsp;&nbsp;&nbsp;4.3 Interfaces and subcontracting procedures<br>&nbsp;&nbsp;&nbsp;&nbsp;4.4 Procedures for design and verification of<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;models <br>&nbsp;&nbsp;&nbsp;&nbsp;4.5 Procedures for integration and validation <br>5 Integrated circuits design (task 2)<br>&nbsp;&nbsp;&nbsp;&nbsp;5.1 Field of application <br>&nbsp;&nbsp;&nbsp;&nbsp;5.2 Description of activities <br>&nbsp;&nbsp;&nbsp;&nbsp;5.3 Interfaces <br>&nbsp;&nbsp;&nbsp;&nbsp;5.4 Procedures for design and verification <br>&nbsp;&nbsp;&nbsp;&nbsp;5.5 Validation procedure <br>6 Wafer fabrication (task 3)<br>&nbsp;&nbsp;&nbsp;&nbsp;6.1 Field of application<br>&nbsp;&nbsp;&nbsp;&nbsp;6.2 Description of activities <br>&nbsp;&nbsp;&nbsp;&nbsp;6.3 Interfaces <br>&nbsp;&nbsp;&nbsp;&nbsp;6.4 Validation procedure <br>7 Process characterization (task 4)<br>&nbsp;&nbsp;&nbsp;&nbsp;7.1 Field of application<br>&nbsp;&nbsp;&nbsp;&nbsp;7.2 Description of activities <br>&nbsp;&nbsp;&nbsp;&nbsp;7.3 Interfaces <br>&nbsp;&nbsp;&nbsp;&nbsp;7.4 Characterization process<br>8 Assembly and packaging (task 5)<br>&nbsp;&nbsp;&nbsp;&nbsp;8.1 Field of application<br>&nbsp;&nbsp;&nbsp;&nbsp;8.2 Description of activities <br>&nbsp;&nbsp;&nbsp;&nbsp;8.3 Interfaces <br>&nbsp;&nbsp;&nbsp;&nbsp;8.4 Validation procedures<br>9 Tests (task 6)<br>&nbsp;&nbsp;&nbsp;&nbsp;9.1 Field of application <br>&nbsp;&nbsp;&nbsp;&nbsp;9.2 Description of activities <br>&nbsp;&nbsp;&nbsp;&nbsp;9.3 Interfaces - Validation of information provided <br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;by the customer or subcontractor<br>&nbsp;&nbsp;&nbsp;&nbsp;9.4 Procedures <br>&nbsp;&nbsp;&nbsp;&nbsp;9.5 Validation procedures

Abstract

Specifies means of applying requirements and principles provided in IEC 61739 to monolithic integrated circuits. Covers integrated circuit manufacturers who request manufacturing line approval. The aim is to establish consistency in the criteria employed by auditors and manufacturers for techniques relating to manufacture of integrated circuits.

General Product Information

Published
Document Type	Standard
Status	Current
Publisher	International Electrotechnical Committee
Pages
ISBN
Committee	TC 47