SEMICONDUCTOR DEVICES - INTEGRATED CIRCUITS - PART 2-11: DIGITAL INTEGRATED CIRCUITS - BLANK DETAIL SPECIFICATION FOR SINGLE SUPPLY INTEGRATED CIRCUIT, ELECTRICALLY ERASABLE, AND PROGRAMMABLE READ-ONLY MEMORY
International Electrotechnical Committee
FOREWORD
INTRODUCTION
1 Marking and ordering information
2 Application related description
3 Specification of the function
4 Limiting values (absolute maximum rating system)
5 Operating conditions (within the specified operating
temperature range)
6 Electrical characteristics
7 Programming
8 Mechanical and environmental ratings, characteristics
and data
9 Additional information
10 Screening (if required)
11 Quality assessment procedures
12 Structural similarity procedures
13 Test conditions and inspection requirements
14 Additional measurement methods
Reference documents
Table 1 - Group A: Lot-by-lot
Table 2 - Group B: Lot-by-lot
Table 3 - Group C: Periodic
Table 4 - Group D
The Quality Assessment System for Electronic Components (IECQ) is operated in accordance with the statutes of and under the authority of the IEC. This system defines quality assessment procedures in such a manner that electronic components released by one participating country as conforming with the requirements of an applicable specification are equally acceptable in all other participating countries without the necessity for further testing. This blank detail specification is one of a series of blank detail specifications for semiconductor devices.
| Document Type | Standard |
| Status | Current |
| Publisher | International Electrotechnical Committee |
| Committee | SC 47A |
| Supersedes |
|
