IEC 61964 : 1.0
IEC 61964 : 1.0
INTEGRATED CIRCUITS - MEMORY DEVICES PIN CONFIGURATIONS
International Electrotechnical Committee
INTEGRATED CIRCUITS - MEMORY DEVICES PIN CONFIGURATIONS
International Electrotechnical Committee
Foreword
Introduction
1 Scope
2 Normative references
3 Terms and definitions
4 Pin Configurations Catalogue
4.1 Integrated Circuit Dynamic Read/Write Memories
4.2 Integrated Circuit Synchronous Dynamic Read/Write
Memories
4.3 Integrated Circuit Static Read/Write Memories
4.4 Integrated Circuit Read-Only Memories
4.5 Integrated Circuit Programmable Read-Only Memories
4.6 MOS Ultraviolet Light Erasable and Programmable
Read-Only Memories
4.7 Integrated Circuit Electrically Erasable and
Programmable Read-Only Memories
4.8 Memory Modules Comprising Integrated Circuit Memories
Annex A (informative) Bibliography
Table 1 - Nibble wide organization DRAM
Table 2 - Byte wide organization DRAM
Table 3 - Word wide organization DRAM (1)
Table 4 - Word wide organization DRAM (2)
Table 5 - Nibble wide organization SDRAM
Table 6 - Byte wide organization SDRAM
Table 7 - Word wide organization SDRAM
Applicable to pinout package configurations of solid state integrated circuit memory devices, intended for establishment of a registration method for such configurations.
Document Type | Standard |
Status | Current |
Publisher | International Electrotechnical Committee |
Committee | TC 47 |