IEC TS 61945 : 1.0

IEC TS 61945 : 1.0

INTEGRATED CIRCUITS - MANUFACTURING LINE APPROVAL - METHODOLOGY FOR TECHNOLOGY AND FAILURE ANALYSIS

International Electrotechnical Committee

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Table of Contents

FOREWORD
Clause
1 Scope and object
2 Normative references
3 Terms
4 Classification of technology analysis
   4.1 First level: General visual inspection
        (AT1 test)
   4.2 Second level: Detailed visual inspection
        (AT2 test)
   4.3 Third level: Scanning electron microscope
        examination under large magnification
        (AT3 test)
   4.4 Fourth level: Construction analysis (AT4
        test)
   4.5 Fifth level: Complementary tests (AT5 test)
5 Failure analysis (AT6 test)
   5.1 Objective
   5.2 Resources
   5.3 Description

Abstract

Gives the methodology for technology and failure analysis in manufacturing integrated circuits. Covers the classification of several levels of technology analysis that can be used for semiconductors and defines for each level: the objective to be performed; the points to be investigated and the tools and techniques needed for currently available technologies to carry out these objectives.

General Product Information

Document Type Standard
Status Current
Publisher International Electrotechnical Committee
Committee TC 47

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