SEMICONDUCTOR DEVICES - INTEGRATED CIRCUITS - PART 2-12: DIGITAL INTEGRATED CIRCUITS - BLANK DETAIL SPECIFICATION FOR PROGRAMMABLE LOGIC DEVICES (PLDS)
International Electrotechnical Committee
FOREWORD
INTRODUCTION
Clause
1 Marking and ordering information
1.1 Marking
1.2 Ordering information
2 Application related description
3 Specification of the function
3.1 Block diagram
3.2 Identification and function of terminals
3.3 Functional description
3.4 Family-related characteristics
4 Limiting values (absolute maximum rating system)
5 Operating conditions (within the specified
operating temperature range)
6 Electrical characteristics
6.1 Static characteristics
6.2 Dynamic characteristics
6.3 Timing diagram
6.4 Capacitances
7 Programming
7.1 Programming mode
7.2 Erasing mode (if applicable)
7.3 Number of programming-erasing cycles
(where appropriate)
7.4 Data retention information test
8 Additional information
9 Screening (if required)
10 Quality assessment procedures
10.1 Qualification approval procedures
10.2 Capability approval procedures
11 Structural similarity procedures
12 Test conditions and inspection requirements
12.1 General
12.2 Sampling requirements and formation of
inspection lots
12.3 Inspection tables
12.4 Delayed deliveries
13 Additional measurement method
13.1 Data retention test (destructive test)
13.2 Write/erase endurance: number of
programming cycles (destructive test)
13.3 Programmability
Reference documents
| Document Type | Standard |
| Status | Current |
| Publisher | International Electrotechnical Committee |
| Committee | SC 47A |
| Supersedes |
|
