SAE J 1752/1 : 2016

SAE J 1752/1 : 2016

ELECTROMAGNETIC COMPATIBILITY MEASUREMENT PROCEDURES FOR INTEGRATED CIRCUITS - INTEGRATED CIRCUIT EMC MEASUREMENT PROCEDURES - GENERAL AND DEFINITIONS

SAE International

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Table of Contents

1. SCOPE
2. REFERENCES
3. DEFINITIONS
4. TEST CONDITIONS
5. TEST EQUIPMENT
6. GENERAL BASIC TEST BOARD SPECIFICATION
7. TEST SETUP
8. TEST PROCEDURE
9. TEST REPORT
10. DATA PRESENTATION
11. INTERPRETATION OF RESULTS
12. NOTES
APPENDIX A (INFORMATIVE) - FLOW CHART OF AN EXAMPLE COUNTER TEST CODE
APPENDIX B (INFORMATIVE) - WORST CASE SOFTWARE DESCRIPTION
APPENDIX C (INFORMATIVE) - EXAMPLE CALIBRATION AND SET UP
                           VERIFICATION SHEET

Abstract

Gives supporting information for the emission and immunity measurement procedures defined in the SAE J1752 series of documents.

General Product Information

Document Type Standard
Status Current
Publisher SAE International

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