IEC 63011-1 ED1.0 B:2018
IEC 63011-1 ED1.0 B:2018
Integrated circuits - Three dimensional integrated circuits - Part 1: Terminology
International Electrotechnical Committee
Specials
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SAE AS 20708/7 : 2017
$78.00 (-56%) $34.32
Abstract
This part of IEC 63011 provides definitions pertaining to multichip integrated circuits, asvertically stacked dies using through-silicon vias (TSVs) or micro bumps.
General Product Information
| Document Type | Standard |
| Status | Current |
| Publisher | International Electrotechnical Committee |
| ProductNote | THIS STANDARD ALSO REFERS TO IEC 63011-3 |
| Committee | TC 47 |
