DELAY AND POWER CALCULATION STANDARDS - PART 3: STANDARD DELAY FORMAT (SDF) FOR THE ELECTRONIC DESIGN PROCESS
Institute of Electrical & Electronics Engineers
FOREWORD
IEEE Introduction
1. Overview
2. References
3. Conventions
4. SDF in the design process
5. Defining the standard delay format
Annex A (normative) - Syntax of SDF
Annex B (informative) - SDF file examples
Annex C (informative) - List of Participants
Describes the representation and interpretation of timing data for use at any stage of the electronic design process.
| Document Type | Standard |
| Status | Current |
| Publisher | Institute of Electrical & Electronics Engineers |
| Supersedes |
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