IEEE 1394.1 : 2004

Table of Contents

1 Overview
   1.1 Scope
   1.2 Purpose
2 Normative references
3 Definitions and notation
   3.1 Conformance
   3.2 Technical
   3.3 Document notation
4 Bridge model (informative)
   4.1 Global node IDs
   4.2 Remote time-out
   4.3 Clan affinity and net update
   4.4 Cycle time distribution and synchronization
   4.5 Universal time
   4.6 Stream connection management
5 Bridge portal and bridge-aware node facilities
   5.1 Configuration ROM
   5.2 Control and status registers
6 Packet formats
   6.1 Self-ID packet zero
   6.2 Cycle master adjustment packet
   6.3 Response packet
   6.4 Global asynchronous stream packets (GASP)
   6.5 Net management message interception
   6.6 Net management messages
   6.7 UPDATE ROUTES message
7 Transaction routing and operations
   7.1 Source bus (initial entry portal)
   7.2 Intermediate buses
   7.3 Destination bus (terminal exit portal)
   7.4 Maximum forward time
   7.5 Congestion management
8 Stream operations and routing
   8.1 Cycle timer synchronization
   8.2 Net time
   8.3 GASP routing and operations
   8.4 Listening portal operations (isochronous streams)
   8.5 Talking portal operations (isochronous streams)
   8.6 Isochronous stream connection management
   8.7 Common Isochronous Packet (CIP) format headers
9 Operations in a bridged environment
   9.1 CSR architecture assumptions
   9.2 Bridge-aware devices
   9.3 Legacy devices
   9.4 TIMEOUT message operations
   9.5 Modifications to the BUS_TIME and CYCLE_TIME registers
   9.6 Remote access to core and bus-dependent CSRs
10 Net update
   10.1 Power reset initialization
   10.2 Bus reset operations
   10.3 Coherency during net update
   10.4 Mute bridge portals
   10.5 Route map updates
   10.6 Net panic
11 Global node ID management
   11.1 Virtual ID management
   11.2 Bus ID management
Annex A (normative) Net correctness properties
Annex B (normative) Minimum Serial Bus capabilities for bridge
        portals
Annex C (normative) Pseudocode data structures and constants
Annex D (normative) Transaction routing
Annex E (normative) Discovery and enumeration protocol (DEP)
Annex F (normative) Plug control registers
Annex G (informative) Bus topology analysis
Annex H (informative) Sample configuration ROM
Annex I (informative) Bibliography

Abstract

Describes the model, definition, and behaviors of High Performance Serial Bus bridges, which are devices that may be used to interconnect two separately enumerable buses.

General Product Information

Published
Document Type	Standard
Status	Current
Publisher	Institute of Electrical & Electronics Engineers
Pages
ISBN
Supersedes	IEEE DRAFT 1394.1 : D0.16 MAR 2001