STANDARD TEST INTERFACE LANGUAGE (STIL) FOR DIGITAL TEST VECTOR DATA - CORE TEST LANGUAGE (CTL)
Institute of Electrical & Electronics Engineers
1 Overview
1.1 General
1.2 SoC flow
1.3 Scope
1.4 Purpose
1.5 Limitations of this standard
1.6 Structure of this standard
2 Normative references
3 Definitions, acronyms, and abbreviations
3.1 Definitions
3.2 Acronyms and abbreviations
4 CTL orientation and capabilities tutorial
4.1 Introduction
4.2 CTL for design configurations
4.3 CTL for structural information
4.4 CTL for test pattern information
4.5 Beyond the examples
5 Extensions to IEEE Std 1450-1999 and IEEE Std 1450.1-2005
5.1 STIL name spaces and name resolution
5.2 Optional statements of IEEE Std 1450-1999
5.3 Restricting the usage of SignalGroup and variable names
5.4 Additional reserved words
5.5 STIL statement - extensions to IEEE Std 1450-1999, Clause 8
5.6 Extensions to IEEE Std 1450-1999, 17.1 and 23.1
5.7 Extensions associated with the LockStep construct
of Clause 13 of IEEE Std 1450.1-2005
6 Design hierarchy - cores
6.1 CoreType block and CoreInstance statement
6.2 CoreType block syntax descriptions
6.3 CoreType block code example
7 Cell expression (cellref_expr)
8 Environment block - extensions to IEEE Std 1450.1-2005, Clause 17
8.1 General
8.2 Definition of FileReference keywords
8.3 Example of Environment block FileReference syntax
8.4 Extension to NameMaps
8.5 Extension to the inheritance of environment statements
9 CTLMode block
9.1 General
9.2 CTLMode syntax
9.3 CTLMode block - syntax descriptions
9.4 CTLMode block syntax example
10 CTLMode - Internal block
10.1 General
10.2 Internal syntax
10.3 Internal block syntax descriptions
10.4 Internal BlockSyntax examples
11 CTLMode - ScanInternal block
11.1 General
11.2 ScanInternal syntax
11.3 ScanInternal block syntax descriptions
11.4 ScanInternal block syntax example
12 CTLMode - CoreInternal block
12.1 General
12.2 CoreInternal syntax
12.3 CoreInternal block syntax descriptions
12.4 CoreInternal block syntax examples
13 CTLMode - Relation Block
13.1 General
13.2 Relation syntax
13.3 Relation block syntax descriptions
13.4 Relation block syntax example
14 CTLMode - ScanRelation block
14.1 General
14.2 ScanRelation syntax
14.3 ScanRelation block syntax descriptions
15 CTLMode - External block
15.1 General
15.2 External statement syntax
15.3 External block syntax descriptions
15.4 External block syntax example
16 CTLMode - PatternInformation block
16.1 PatternInformation syntax
16.2 PatternInformation block syntax descriptions
16.3 PatternInformation block syntax example
Index
Describes constructs that represent the test structures internal to the core for reuse in the creation of the tests for the logic outside the core. This provides constructs that will allow for the wrapping operation of an unwrapped core and the necessary wrapper specific information for a wrapped core.
| Document Type | Standard |
| Status | Current |
| Publisher | Institute of Electrical & Electronics Engineers |
| Supersedes |
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