EXTENSIONS TO STANDARD TEST INTERFACE LANGUAGE (STIL) (IEEE STD 1450[TM]-1999) FOR TESTER TARGET SPECIFICATION
Institute of Electrical & Electronics Engineers
1 Overview
1.1 Scope
1.2 Purpose
1.3 TRC limitations
2 Normative references
3 Definitions
4 Structure of this standard
4.1 Formats from STIL.0
4.2 Additional formatting conventions
4.3 Dependencies on IEEE Std 1450.1
5 STIL syntax description
5.1 Additional reserved words
5.2 Keywords used in a TRC block
6 Statement usage and organization by flow
6.1 TRC usage for ATE constraint specification
6.2 TRC usage for design/pattern constraints
6.3 TRC usage for pattern reporting
6.4 TRC usage for tester targetting
7 STIL statement
7.1 STIL syntax
7.2 STIL example
8 Variables block extensions
8.1 Variables block syntax
8.2 Variables example
9 Resource statement
9.1 Resource statement syntax
10 TRC: TestResourceConstraints block
10.1 TRC syntax
10.2 TRC example
10.3 TRC block sharing rules
11 TRC: SignalAttributes
11.1 TRC: SignalAttributes - syntax
11.2 TRC: SignalAttributes - examples
12 TRC: DCResourceAttributes
12.1 TRC: DCResourceAttributes - syntax
12.2 TRC: DCResourceAttributes - example
13 TRC: PeriodAttributes
13.1 TRC: PeriodAttributes - syntax
13.2 TRC: PeriodAttributes - examples
14 TRC: WaveformAttributes
14.1 TRC: WaveformAttributes - syntax
14.2 TRC: WaveformAttributes - examples
15 TRC: WaveformDescriptions
15.1 TRC - WaveformDescriptions - syntax
15.2 TRC: WaveformDescriptions - examples
16 TRC: PatternAttributes
16.1 TRC: PatternAttributes - syntax
16.2 TRC: PatternAttributes - examples
17 TRC: NameChecks block
17.1 NameChecks block - syntax
17.2 NameChecks - examples
Annex A (informative) Glossary
Annex B (informative) Fluid concepts in parameter specification
Annex C (informative) Tester channel map
Annex D (informative) Example of TRC for a simple tester model
Annex E (informative) Example of TRC used to define waveforms
and timing
Annex F (informative) Example of TRC used for resource reporting
Annex G (informative) Example of tester targeting and tester
loading
Annex H (informative) Example of vector memory checking
Annex I (informative) Waveform generator model
Annex J (informative) File encryption
Annex K (informative) Regular expression reference
Describes structures in STIL for the specification of resource mapping of ATE hardware architectures. An example of resource mapping is the assignment of tester resources to waveform characters that are used in STIL vectors.
| Document Type | Standard |
| Status | Current |
| Publisher | Institute of Electrical & Electronics Engineers |
| Supersedes |
|
