IEEE 1394 : 2008

Table of Contents

1. Overview
    1.1 Scope and purpose
    1.2 Document organization
    1.3 Serial bus applications
    1.4 Service model
    1.5 Document notation
    1.6 Compliance
2. Normative references
3. Definitions, acronyms, and abbreviations
    3.1 Definitions
    3.2 Acronyms and abbreviations
4. Short-haul copper connector and cable specification
    4.1 Introduction
    4.2 6-circuit Alpha connectors and cables
    4.3 4-circuit Alpha connectors and cables
    4.4 9-circuit Beta and bilingual connectors and cables
5. Backplane PHY specification
    5.1 Backplane PHY services
    5.2 Backplane physical connection specification
    5.3 Backplane PHY facilities
    5.4 Backplane PHY operation
    5.5 Backplane initialization and reset
6. Link layer specification
    6.1 Link layer services
    6.2 Link layer facilities
    6.3 Link layer operation
    6.4 Link layer reference code
7. Transaction layer specification
    7.1 Transaction layer services
    7.2 Transaction facilities
    7.3 Transaction operation
    7.4 CSR architecture transactions mapped to serial bus
8. Serial bus management (SBM) specification
    8.1 SBM summary
    8.2 SBM services
    8.3 SBM facilities
    8.4 SBM operations
    8.5 Bus configuration state machines (cable environment)
9. Short-haul copper PMD electrical specification
    9.1 Introduction
    9.2 Data-strobe (DS) mode specification
    9.3 Beta mode specification
    9.4 Cable power and ground
10. Glass optical fiber (GOF) PMD specification
    10.1 PMD block diagram
    10.2 PMD-to-MDI optical specifications
    10.3 Transmitter optical specifications
    10.4 Receiver optical specifications
    10.5 Worst-case connection optical power budget and penalties
    10.6 Optical jitter specifications
    10.7 Optical measurement requirements
    10.8 CPR measurement
    10.9 Optical connection cabling model
    10.10 Optical connection
    10.11 Fiber launch conditions: OFL
11. PMD specification of fiber media with PN connector
    11.1 Scope
    11.2 PMD block diagram
    11.3 Cables
    11.4 Connector
    11.5 Connector and cable assembly performance criteria
    11.6 Optical fiber interface
    11.7 Optical jitter specifications
    11.8 Permitted number of segments
12. Unshielded twisted pair (UTP) PMD specification
    12.1 Overview
    12.2 PMD block diagram
    12.3 Operation of UTP connections
    12.4 Media specification
    12.5 PMD electrical specifications
    12.6 PMD implementation
13. Beta mode port specification
    13.1 Overview
    13.2 Port functions
    13.3 Beta mode port operation
    13.4 Beta port state machines
14. Connection management
    14.1 Overview
    14.2 Port characteristics
    14.3 Functions, variables, and constants
    14.4 Node-level port controller
    14.5 Port connection manager state machine
    14.6 Standby
    14.7 Loop prevention
    14.8 Connection management
    14.9 T-mode connectivity and operation
    14.10 Simultaneous support for Beta mode and T-mode
    14.11 Negotiation
15. PHY register map
    15.1 Arbitration compliance levels
    15.2 PHY register map for the cable environment
    15.3 PHY register map for the backplane environment
    15.4 Integrated link and PHY
16. Data routing, arbitration, and control
    16.1 Overview
    16.2 PHY services
    16.3 PHY facilities
    16.4 Cable PHY operation
17. Parallel PHY-link interface
    17.1 Introduction
    17.2 Alpha (A) PHY-link interface specification
    17.3 Beta (B) and Beta Plus (B Plus) PHY-link interface
          specification
    17.4 Isolation barrier
18. PIL-FOP serial interface
    18.1 Operating model
    18.2 PIL-FOP connection management
    18.3 Serial bus configuration request types not carried
          over the PIL-FOP interface
    18.4 P2P packet protocol
19. PHY C code
    19.1 Common declarations and functions
    19.2 Connection management routines
    19.3 Port state machine actions
    19.4 Border arbitration actions and conditions
    19.5 Border arbitration
20. T-mode port specification
    20.1 Overview
    20.2 Port functions
    20.3 T-mode port operation
21. S800 UTP (T-mode) PMD electrical specification
    21.1 T-mode PMD specification
    21.2 T-mode PMD initialization
    21.3 Gigabit media independent interface (GMII)
    21.4 T-mode suspend and resume
    21.5 UTP cable power
Annex A (normative) Cable environment electrical isolation
  A.1 Grounding characteristics of ac-powered devices
  A.2 Electrical isolation
  A.3 Agency requirements
Annex B (normative) External connector positive retention
Annex C (normative) Internal device physical interface
  C.1 Overview
  C.2 Electrical interface for internal devices
  C.3 Internal unitized device connectors
Annex D (normative) Backplane PHY timing formulas
  D.1 Backplane propagation delay
  D.2 Backplane arbitration timing
  D.3 Backplane gap timing
  D.4 Backplane environment skew
Annex E (normative) Cable operation and implementation
        examples
  E.1 Performance optimization
  E.2 Cable environment jitter budget
  E.3 Cable PHY configuration example
Annex F (normative) Backplane physical implementation example
  F.1 Standardized parallel bus implementations
  F.2 PHY implementation
Annex G (normative) Backplane IRM selection
  G.1 Backplane configuration management
  G.2 IRM selection process
  G.3 Example of an IRM selection process
Annex H (normative) Serial bus configuration in the cable
        environment
  H.1 Bus configuration timeline
  H.2 Bus configuration scenarios
  H.3 Combined bus manager and IRM
  H.4 Abdication by the bus manager
Annex I (normative) Socket PCB terminal patterns and mounting
  I.1 Socket orientation
  I.2 PCB mounting 0
Annex J (normative) Transaction integrity safeguards
Annex K (normative) Serial bus cable assembly test procedures
  K.1 Scope
  K.2 Test fixtures
  K.3 Signal pairs characteristic and discrete impedance
  K.4 Signal pairs attenuation
  K.5 Signal pairs velocity of propagation
  K.6 Signal pairs relative propagation skew
  K.7 Power pair characteristic impedance
  K.8 Crosstalk
Annex L (normative) Shielding effectiveness and transfer
        impedance testing
  L.1 Content
  L.2 Definitions
  L.3 Test equipment
  L.4 Theory
  L.5 Sample preparation
  L.6 Procedure
  L.7 "Noise floor" plot
  L.8 Documentation
  L.9 Performance
Annex M (informative) Serial bus topology considerations for
        power distribution (cable environment)
Annex N (normative) Jitter measurements
  N.1 Test patterns
  N.2 Random pattern (SB_RPAT)
  N.3 Receive jitter tolerance pattern (SB_JTPAT)
  N.4 Supply noise test sequence (SB_SPAT)
Annex O (informative) Connection status change
Annex P (informative) Deriving bus topology from self-ID
        packets
  P.1 Bus topology analysis
  P.2 Topology analysis after power reset
  P.3 Topology analysis when the root changes
  P.4 Topology analysis when a node is inserted
Annex Q (informative) Summary description
  Q.1 Node and module architectures
  Q.2 Topology
  Q.3 Addressing
  Q.4 Protocol architecture and data transfer services
  Q.5 Transaction layer
  Q.6 Link layer
  Q.7 Physical layer (PHY)
  Q.8 Bus management
  Q.9 New features of IEEE Std 1394a-2000
  Q.10 New features of IEEE Std 1394b-2002
  Q.11 New features of IEEE Std 1394c-2006
  Q.12 New features of IEEE Std 1394-2008
Annex R (informative) Glossary
  R.1 Conformance
  R.2 Definitions
Annex S (informative) Bibliography

Abstract

Specifies a high-speed, low-cost serial bus suitable for use as a peripheral bus, a backup to parallel backplane buses, or a local area network.

General Product Information

Published
Document Type	Standard
Status	Current
Publisher	Institute of Electrical & Electronics Engineers
Pages
ISBN
Supersedes	IEEE DRAFT 1394 : D8.0V2 JUL 95